instruction simulator
英 [ɪnˈstrʌkʃn ˈsɪmjuleɪtə(r)]
美 [ɪnˈstrʌkʃn ˈsɪmjuleɪtər]
【计】指令模拟程序
双语例句
- A Design and Optimization of ARM Instruction Set Simulator
一种ARM指令集仿真器的实现与优化 - In this paper, the strategy of interpretative simulation is applied, and the design and implementation of retargetable instruction set simulator are discussed.
该文采用解释型模拟策略，阐述可重用的指令集模拟器的实现方法。 - In the designing and exploitation progress of a DSP core, the instruction level simulator can be used in the emulation and debugging, and it is propitious to expedite the rate of development.
在DSP内核的设计、开发过程中，指令级模拟器可用于汇编程序仿真、调试，有利于加快芯片开发进度。 - Instruction sets simulator has big granularity, abstracts some part of hardware and has a very high speed when executed.
指令集软件仿真器仿真的粒度较大，对硬件进行了某种程度的抽象，结果是运行速度比较快。 - An instruction set simulator is a tool that simulates the behavior of a program running on a target machine.
指令仿真器是一种用计算机软件来模拟程序在目标芯片上运行情况的工具。 - High Performance Instruction Set Simulator Using Dynamic Decode Cache
采用动态译码缓存的高速指令集模拟器 - The paper introduces the installation? file configuration and hardware simulation logic structure of instruction level simulator.
介绍指令级模拟器SkyEye及安装、文件配置、硬件模拟逻辑结构。 - Structure simulator and instruction set simulator have different type ofthe software simulator.
软件仿真器分为结构仿真器和指令集软件仿真器。 - A Fast and Flexible Instruction Set Simulator Reserch on Automatic Generation of ISA Simulator
一种高速灵活的指令仿真器指令集仿真器自动生成技术的研究 - A Solution to Realize Reusable and Ultra Fast Instruction Set Simulator The Development of Microprocessor in Media Processing Field& Development of CPU Instructions
一种基于虚指令集技术构建快速的可重用的指令集仿真器的方法CPU指令集的发展 - In order to meet the demand of Application Specific Instruction Set Processor development and shortened time-to-market, the automatic generation environment of functional simulator has caught more and more attention.
为了满足专用指令集处理器的发展和产品上市时间缩短的需要，功能模拟器的自动生成方法受到越来越多的关注。 - On the framework, it develops a universal instruction simulator core and system inter-connection model, processor model, memory model, device model and debug model.
实现了基于虚拟指令集的通用处理器内核，同时实现了通用的系统互联模型，处理器模型，存储器模型、外围设备模型和调试模型。 - A Hardware-Software Co-verification Environment Based on Instruction Set Simulator
一种基于ISS的软硬件协同验证环境 - An ARM7 instruction set simulator is implemented for illustration, and the optimization techniques presented in this paper are also applicable for most other modern RISC architectures.
以ARM7指令集模拟器为实例，所提出的优化技术同样适用于其它现代RISC体系结构。 - The research of time simulation of computer instruction-set simulator
计算机指令集仿真器的时间仿真技术研究 - Design and Implementation of Intelligentized Operating Instruction System of Simulator
模拟训练器智能化操作指令系统的设计与实现 - The obtained results can provide reference for the design of the MCAI based on individual and network instruction, and are valuable for developing the training simulator MCAI system in project practice.
论文的成果为设计基于个别化和网络化教学模式的多媒体教学软件提供了借鉴，对于训练模拟器MCAI软件的开发具有一定的工程实用价值。 - There are two major types of full instruction simulator: interpretation simulator ( Bochs) and dynamic translation ( JVM, CLR).
同声翻译技术全指令模拟器分为解释型（Bochs）和动态翻译（JVM，CRL）两大类。 - Instruction Set Simulator is one important tools in design of processor, compiler and embedded system.
指令集模拟器是处理器、编译器以及嵌入式系统设计中的重要工具之一。 - The instruction run both in hardware and in simulator and the result can be checked on real-time, which increases debug efficiency.
指令的硬件执行和软件仿真同时进行，可以对硬件运行结果进行实时检验，实现了软硬件协同调试，大大提高了调试效率。 - Through the environment, the designers can complete the architecture customization quickly, and then generate the instruction set simulator using the architecture description file and operation description file.
通过该环境，设计者可以快速完成处理器架构的定制以及重定向，利用架构描述文件和操作描述文件实现指令集仿真器的快速生成。 - Instruction Set Simulator ( ISS) is widely used in code analysis and execution simulation, but most of traditional instruction set simulators are designed for particular processor architecture.
指令集模拟器广泛应用于软件代码分析与程序模拟执行，但传统的指令集模拟器大多仅针对某种特定处理器架构，不具备通用性。 - My research is part of the new Instruction Simulator.
本文所研究的视景系统是新一代模拟器的一部分。 - The experimental results proved the validity of the given instruction set simulator, and experimental results show that the TTA processor instruction set simulator has a strong practicality not only for hardware designers but also for system developers.
实验结果证明了本论文给出指令集仿真器ESL设计方法的正确性，并且实验结果显示本论文设计的TTA架构处理器的指令集仿真器，对硬件设计者和系统开发者都有较强的实用性。 - This paper establishes a hardware-software co-verification platform for embedded system, which is based on fast prototyping FPGA and instruction set simulator ISS, and carries out a in-depth exploration and study.
本文建立了一种基于硬件加速器FPGA和指令集模拟器ISS对嵌入式系统功能进行软硬件协同验证的方案，并对该方案进行了深入的探讨和研究。 - The discussed contents include instruction definition and decode, the handling of system call which is implemented through the host proxy mechanism. ( 2) Design and implementation of modules of the simulator.
该部分主要介绍了指令的定义与解码和系统调用处理。其中，系统调用的实现方式采用宿主机代理。（2）数据流多核模拟器功能模块的设计与实现。 - The core work of embedded system simulation is instruction-set simulation, the development of Instruction Set Simulator purely by hand is an onerous task, and easily goes wrong.
嵌入式系统仿真的核心工作就是指令集仿真，但纯手工开发一个指令集仿真器不但是一项繁重的工作，而且极易出错。